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VLSI

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Suggested Audience –   College Students and Software Developers/Programmers


Good to Have

  • Knowledge of C or C++ would be added advantage.

Questions?  Call back

 

 Syllabus

 

Devices and Circuits for Microelectronics

- MOSFET Characteristics, MOSFET Capacitances

-  CMOS Inverter - Conceptualizing the Inverter using Network Elements, Inverter VTC, Transient Response

-  CMOS Gate Design

-  PN Junction, BJT Device Characteristics and Applications Review OPAMP Applications – Review

 

Digital System Design

-  Quality Metrics of a Digital System

-  Review of Number Systems , Combinational Logic Design

-  Interpreting the Logic gate Data Sheets

-  Designing with Mux, Demux, Decoders, Encoders

-  Sequential Elements and Sequential Logic Design- D Latch, D Flop Design of Sequential Systems Registers and Counters

 

Basic C Programming

-  Introduction to C Programming - Structure of a C program, The C compilation process

-  Types and Operators - C base types, Precedence & associativity, - Arithmetic operations

-  Functions -The Function as a logical program unit, Parameter passing, Memory segments Control Flow

-  Logical expressions and operations, Decision Making, Loops, Introduction to Pointers

 

Advanced Digital System Design

-  Synchronous Finite State Machine Design

- Data-path elements - Arithmetic Structures

-  Introduction to and Programmable Platforms

-  Design Capture and Simulation

-  Practical Digital System Design Examples

 

Chip Design Methodology – I

-  Driver for VLSI: Moore's law

-  Evolution of Design Approaches (leading upto HDLs),

-  Simulator and Synthesizers Specification formation to Micro – architecture

 

Digital System Design with Verilog

-  Hardware Modeling Overview,

-  Verilog language concepts

-  Modules and Ports

-  Dataflow Modeling

-  Introduction to Test benches

-  Operators

-  Procedural Statements

-  Controlled Operation Statements

-  Coding for Finite State Machines

-  Coding For Synthesis

-  Tasks and Functions Advanced Verilog Test benches

 

Functional Verification

-  Introduction to Verification

-  Introduction to Verification Plan

-  Verification Tools

-  Stimulus and Response

-  Introduction to Bus Function Models Verification environment and its components

 

Chip Design Methodology – II

-  Advanced Simulation and Synthesis

-  Introduction to Design Verification RTL design, synthesis, verification, regression

 

Verification using System Verilog

-  System Verilog Basics - Introduction to System Verilog, Enhancement Made in System Verilog over Verilog, Interface and

   Modports

-  System Verilog for Verification - System Verilog Event Ordering,

-  Clocking block and Program bloc,OOP's Concept of System Verilog - Parameterized classe, Virtual interface, Constrained

   Randomization techniques, Functional Coverage (Coverage Driven Verification) System Verilog Assertions - Introduction to

   Assertion, Properties, Sequences, Checkers, Assertions in design, Verification (for Coverage Analysis)

 

Digital System Design using FPGAs

FPGA Architecture - Basic Components of FPGA (LUT, CLB, Switch Matrix, IOB), FPGA Architecture

-  Optimal FPGA Design - HDL Coding Techniques for FPG, FPGA Design Techniques Synthesis Techniques, Implementation,

   Options - Overview, Achieving Timing Closure, Path Specific Constraints, Introduction to Advanced IO Timing

-  FPGA Design Flow - Xilinx tool Flow, Reading Reports, Implementing IP cores, Pin Planning using Plan Ahead, Global Timing

   Constraints,Debugging Using Chipscope Pro

-  Static Timing Analysis - Introduction Reset Techniques, Clock Domain Crossing, Multiple Clock Domains, Dual

   Synchronization

 

Chip Design Methodology – III

-  Design and Verification Guidelines

-  SoC Verification Methodology Physical Design, Manufacturing, Silicon validation

Course Project

 

upcoming training

Java Developer Required 3-5 years of experience on SpringMVC Framework and WebServices
Two-Days Workshop On SpringMVC FrameWork On This Week-Ends: - 12/08/2017 and 13/08/2017
.  

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